GTC Santa Clara Agenda
|7:30am - 9:00am||Lobby / Hall B||Registration & Continental Breakfast|
|Morning Plenary Sessions|
|9:00am - 9:15am||Hall D (Hall A-2, Hall A-3 Overflow)||Welcome to GTC 2011
Jim Kupec, Sr. VP of Sales and Marketing, GLOBALFOUNDRIES
|9:15am - 9:40am||Hall D (Hall A-2, Hall A-3 Overflow)||Keynote: Our Commitment to our Customers
Ajit Manocha, CEO, GLOBALFOUNDRIES
|9:40am - 10:05am||Hall D (Hall A-2, Hall A-3 Overflow)||Innovation in Action: Leading in Innovation Awards
Hosted by Jim Ballingall, VP of Marketing, GLOBALFOUNDRIES
|10:05am - 10:40am||Hall D (Hall A-2, Hall A-3 Overflow)||Technology Solutions
• From 28nm to 20nm and Beyond
• HKMG Product Demo: Innovation in Computer Platforms
Gregg Bartlett, Sr. VP Technology and Integration Engineering, GLOBALFOUNDRIES
|10:40am - 11:00am||Hall B||Morning Break in the GLOBALSOLUTIONS Partner Pavilion|
|11:00am - 11:30am||Hall D (Hall A-2, Hall A-3 Overflow)||Design Solutions: Collaborating to Fully Enable Your Future Designs
Mojy Chian, Sr. VP Design Enablement, GLOBALFOUNDRIES
|11:30am - 12:10pm||Hall D (Hall A-2, Hall A-3 Overflow)||
Global Capacity: Enabling New Sources of Customer Value
• 300mm and Beyond
Norm Armour, VP Fab - FAB 8, GLOBALFOUNDRIES
• Our Vision for 200mm Solutions
Raj Kumar, Sr. VP and General Manager, GLOBALFOUNDRIESSingapore
|12:10pm - 1:10pm||Hall C (Dessert in Hall B)||Lunch
|Afternoon Plenary Session|
|1:10pm - 2:10pm||Theater (Hall A-2, Hall A-3 Overflow)||
CEO Panel: "Design Enablement Challenges and Future Solutions"
Pundits have long predicted the convergence of computing, communications, consumer technologies. Today's converged electronic devices are faster, smaller, cheaper, always available, un-tethered, and support interactive data-rich applications often existing in a cloud. The actual convergence realization has greatly exceeded what the early pundits predicted thanks to highly synergized, multi-dimensional support ecosystems supporting the utilization and optimization of the billions of transistors that the leading edge process technologies provide. Harnessing the potential of the process technology enables new applications and products that are able to reach the markets and reach volume production quickly and cost effectively satisfying the global demand for consumer mobile applications.
The following executive panelists will address questions about the role of collaboration in developing design solutions for the leading edge process technology and the exciting product potential these new technologies unleash.
|2:10pm - 2:30pm||Hall B||Afternoon Break in the GLOBALSOLUTIONS Partner Pavilion|
|2:30pm - 4:30pm||Parallel Tracks — GLOBALFOUNDRIES Solutions|
|Theater||Track 1: Technology Solutions
• 28nm Platform
• 65/55/40nm Platforms
• Embedded NVMemories
|Hall A-2||Track 2: Design Enablement
• Reference Design Flows
• Design Solutions
|Hall A-3||Track 3: Manufacturing
• Global Site "Tours"
• Assembly Solutions
• Advanced Packaging
|4:30pm - 5:30pm||Parallel Tracks — GLOBALSOLUTIONS Platinum Partner Presentations|
Track 1: ARM
PANEL: "Time For a Mainstream Revolution?"
Track 2: Cadence
"Cadence-GLOBALFOUNDRIES Collaboration Results in Designer Productivity"
Track 3: Mentor Graphics
"A New Method to Accelerate the Yield Ramp"
|Great America J & K||
Track 4: Synopsys
"Addressing Physical Implementation Challenges at 20nm"
JC has been with Synopsys for more than 15 years working on various technologies, including RTL Synthesis and Physical Synthesis. Currently, JC leads the placement and clock tree synthesis (CTS) teams for IC Compiler. He holds a Ph.D. degree in Computer Science from State University at New York (SUNY) at Stony Brook.
Track 5: Channel Partners
|5:30pm - 7:00pm||GLOBALSOLUTIONS Pavilion and Reception|