Mentor TDK's

Overview - What is a Mentor Technology Design Kit?

Mentor's Technology Design Kit is a comprehensive and proven set of building blocks that enables semiconductor companies and electronics systems manufacturers to jump-start their design cycles using Mentor's analog/mixed-signal (AMS) IC Flow, thereby cutting time-to-market and ensuring manufacturing success of analog, RF and mixed-signal ICs and systems on chip (SoCs).

Mentor Graphics and GLOBALFOUNDRIES Semiconductor have teamed to develop TDKs for popular GLOBALFOUNDRIES manufacturing processes at multiple technology nodes, starting first with 0.18 micron. These AMS TDKs include all the foundry-specific data files and models for use with the Mentor Graphics integrated IC Flow comprised of the following tools: Design Architect-IC for schematic entry, Eldo and ADMS for analog and mixed-signal simulation, IC Station and ICassemble for schematic-driven layout and chip assembly, and Calibre for DRC/LVS verification and extraction.

Mentor Graphic Analog/Mixed-Signal IC Flow

Mentor's custom IC Flow consists of a tightly integrated set of tools that provide a complete, end-to-end solution for schematic capture, netlisting, simulation, physical layout, verification, and parasitic extraction of analog/mixed-signal (AMS) and RF IC designs.

TDKs are a fundamental part of Mentor's IC design flow. By providing customizable, easily expandable building blocks for design capture, simulation, layout and verification, TDKs eliminate the difficult and time-consuming task of setting up a design environment tailored to a foundry-specific process technology.

TDK Components:

Pre-configured symbols for schematic capture, with predefined properties for Eldo simulation, schematic-driven layout with IC Station, and Calbre LVS^TM
Pre-configured Process Definition File for IC layout
Foundry-supported Calibre® DRC and LVS rule files
Foundry-supported Eldo^TM models
Pre-configured Netlist Configuration File
Programmable device generators for each component, that produce correct-by-construction layouts in IC Station directly from schematic symbols
Userware to customize the library palettes listing the available components
Fast, simple installation
Documentation:
- Release_notes: Unique requirements for the TDK and revision history. This file documents which specific Eldo models and DRC/LVS files were used to validate the design kit.
- Installation_Guide: Brief description of TDK contents and installation procedure
- Library_Specification.pdf: List of Components included in the TDK describing the menu name and associated model names and properties
- Users_Guide.pdf: Users Guide and tutorial

GLOBALFOUNDRIES TDK Active Components:
Logic & Analog RF MOS. LPNP & VPNP BJTs. Native & Low Vt Transistors

GLOBALFOUNDRIES TDK Passive Components:
Diodes, Resistors, MOS & PN Varactors, Inductors. MIM, PIS Capacitors. Poly
Resistors

TDK Benefits:

Ensures manufacturing success
Speeds the setup of complete schematic and layout design environments
Reduces costly rework cycles due to DRC/LVS errors with correct-by-construction device generators
Eliminates expensive mistakes due to inaccurate simulation models
Available at no cost to customers

Schematic Symbols

The Mentor Graphics Technology Design Kits include schematic symbols that complement the foundry-supplied models and Calibre LVS^TM rule decks, reducing costly learning curves for CAD engineers setting up new schematic entry systems. The Mentor Graphics Technology Design Kits include all of the overhead symbols necessary to set up a schematic to simulate—including current sources, I/O pins, voltage references and more. The symbols are also configured to run and verify physical layout using the Mentor Graphics ICtrace verification tool.

Pre-configured Process Definition File

The Process Definition File (PDF) allows a designer to use the ICgraphic^TM layout editing tool right out of the box. The PDF contains the foundry-recommended layers, along with all DRC information needed to build "correct by construction" devices for an SDL environment. A simple formatted ASCII file has also been included to quickly modify user preferences.

Foundry-Supported Rule Files and Models

Building foundry-specific DRC and LVS rule files is a time-consuming task that can take thousands of man-hours to develop and validate. Foundry-supplied DRC and LVS decks eliminate this costly step.

The Mentor Graphics Calibre physical verification tools are the gold standard at the industry's top foundries. These foundries offer rule files to Mentor Graphics customers at no cost, which makes the initial overhead required to support DRC/LVS decks a thing of the past. Users have access to these technology files and can be assured of no costly rework cycles due to errors in the DRC/LVS deck. Calibre DRC and LVS rule files ensure that users have a single rule file to support for both interactive and batch mode DRC and LVS runs, eliminating the need for two rule decks and effectively decreasing the cost of ownership.

Foundry-Supported Eldo Simulation Models

Foundry-supplied Eldo models ensure that no costly mistakes occur from inaccurate models, allowing designers to concentrate on the design rather than the accuracy of the models. As with the Calibre rule files, most major foundries offer Eldo simulation models at no cost.

Out-of-Box Netlisting

Defining and configuring a new netlisting system is a time-consuming task that requires great attention to detail, so the Mentor Graphics Technology Design Kits come with a complete, smart netlisting system that enables immediate productivity. The supplied schematic symbols and netlist configuration file have been perfectly matched to allow the user to netlist for the following simulators:

Eldo - The industry standard for high-accuracy analog simulation
Eldo RF - The high-performance RF IC verification tool
ADVance^TMMS - The first simulator to support VHDL, VHDL-AMS, Verilog and SPICE
Mach TA^TM - An ultra-fast timing simulator targeted for DSM digital verification

Programmable Device Generators

Ready-to-use programmable device generators can significantly speed up layout design by enabling designers to automatically create logically correct and design-rule-compliant layouts directly from the information stored in the logic source (schematic symbols or netlist). In addition, parameterized layout allows standardization across multiple users and sites for design, creating DRC-correct complex layouts with a simple command, leading to improved reliability of the final product. Depending on the process technology, a TDK may include device generators for transistors, capacitors, resistors, vias, guard bands, inductors and varactors.

Transistor devices: The transistor device enhances productivity for all designs, including complex memory designs using bent gates. Transistor editing commands offer enhanced flexibility for intricate designs without destroying the device, improving productivity and reliability.

Capacitor devices: The capacitor device creates standard capacitors as well as complex switch capacitors, with a single command, for increased productivity. The shape-based capacitor device allows layout designers to 'fill' areas with capacitors for area savings, and increase flexibility for future design changes.

Via devices: The via device allows design engineers to quickly create power rail connections with one simple command.

Resistor devices: The resistor device supports multiple processes, as well as series and parallel structures. Creation of matched resistors is accomplished with a single command.

Guard band devices: The guard band device enables design engineers to quickly shield sensitive analog layouts. Guard band editing commands include the ability to cut, in order to complete routing to sensitive analog layouts, which increases productivity.

Shar-Script Installation

Delivery and installation of the Mentor Graphics Technology Design Kits is extremely simple; and, with automatic system setup, there are no time-consuming environment variables to configure.

Currently Available GLOBALFOUNDRIES TDK:
90nm Generic
65nm Low Power

Process to get the latest Technology design kit

Customer contacts GLOBALFOUNDRIES account manager with request for specific Technology Design Kit.
GLOBALFOUNDRIES account manager makes sure an appropriate NDA is in place.
In parallel, customer must also register at the Mentor AMS website (http://www.mentor.com/products/ic_nanometer_design/foundries/tdks.cfm).
Customer will receive email notification from Mentor with download instructions within four days.

To learn more about how the Mentor Graphics analog/mixed-signal TDKs can get your layout design team up and running—and productive—quickly, contact Mentor Graphics at 800.547.3000.